The invention is concerned with an image sensor for reading images and its driving method.
An image sensor consisting of a photodiode array has been used for an image reading device for a facsimile, an image scanner, and the like.
Amorphous silicon has such excellent photoelectric conversion characteristics that it is used as the material to manufacture photodiodes.
A matrix drive system which consists of a small number of drive ICs, as compared with the number of pixels, is often used. The matrix drive system is composed of a photodiode array which is divided into a plurality of blocks. When an image is read, each block is selected in order and a signal corresponding to the amount of exposed light is read out block by block in order.
However, there is a problem in the matrix drive system in which image information is read out as an electric current. The problem is that precise image information can not be obtained because of a fluctuation in the inductance of the wiring connected to the photodiodes, and in stray capacitance between the wiring.
A reading circuit shown in FIG. 14 is proposed to solve the problem.
In FIG. 14, blocks, the number of which is n are connected with the circuit, wherein each block has photoelectric conversion elements the number of which is m. In this circuit diagram, the photoelectric conversion element is shown by an equivalent circuit. Bi is the common connection terminal of each block and connected with the bias potential -V when the block is selected or connected with the ground when the block is not selected. Bi is defined as the common electrode of the block the number of which is i when it is counted from the first block, wherein i is 1&lt;i&lt;n. SBi is the switch of the block the number of which is i, when it is counted from the first block, wherein i is 1&lt;i&lt;n. Each photoelectric conversion element is represented by an equivalent circuit consisting of blocking diode BD, photodiode PD, accumulating condenser Cp which is connected with photodiode PD in parallel, and condenser CB which is connected with blocking diode BD in parallel. BDij and PDij represent the elements which are in the block, the number of which is i when it is counted from the first block, and the number of which is j in the block i, wherein i is 1&lt;i&lt;n and j is 1&lt;j&lt;m. Portion M surrounded by a broken line is the matrix wiring unit. CRj is a condenser for reading out which is connected with each photoelectric conversion element and its capacitance is much larger than that of accumulating condenser Cp. Sj is a reset switch to reset reading out condenser CRj. Aj is a buffer amplifier to receive the potential of reading out condenser CRj. SRj is a selector switch which is used when the output of buffer amplifier Aj is read out. CRj, Sj, Aj, and SRj represent elements the number of which is j, wherein j is 1&lt;j&lt;m.
FIG. 15 is a diagram which shows potential being impressed on common electrode Bi which is used to drive the above-described reading cuircuit. Potential -V is impressed on the common electrode Bi in the sequence order, wherein i is 1&lt;i&lt;n. As shown in FIG. 14, photoelectric conversion elements are placed in the form of a line. An image is read by a line of photoelectric conversion elements. The time needed to read an image by a line of photoelectric conversion elements is defined as the reading period. Image reading conducted by a line of photoelectric conversion elements in the reading period is repeated.
FIG. 16 is a diagram which shows the time when switch S and SR should be turned on and off in order to read out the information in the block when the potential -V is impressed on common electrode B.sub.1. As shown in the diagram, while the potential -V is impressed on common electrode B.sub.1, the switches are turned on in the order of SR1.fwdarw.S1.fwdarw.SR2.fwdarw.S2 .fwdarw.. . . .fwdarw.SRm.fwdarw.Sm. In other words, SR is for reading out and S is for resetting condenser (or capacitor) CR after reading out of each block has been completed, referring to 16-i in FIG. 16.
When this type of reading circuit is used, the current corresponding to the amount of light projected to photodiode PD, is charged into condenser CR at the time of selecting a block. As a result, a light signal can be obtained in the sequence order as the voltage between both terminals of condenser CR.
FIG. 17 is a schematic illustration which shows an approximate layout of electric devices shown in FIG. 14, wherein they are laid out on a substrate. In FIG. 17, the numeral 1 is a substrate made from glass or ceramics. The numeral 2 is a diode unit in which photodiode PD and blocking diode BD are laid out. L is a lower layer electrode or a lower layer wire. L.sub.11 to Lnm are lower layer electrodes which guide the output of each photodiode PDij in the diode unit 2. U is an upper layer electrode or an upper layer wire. U.sub.1 to U.sub.6 are upper layer electrodes which guide the output from lower layer electrodes L.sub.11 to Lnm to IC4 for reading. Lower layer electrodes L and upper layer elecrodes U are made from such metals as Al, Cr, Ti, and Mo. The numeral 3 is an insulation layer of SiO.sub.2, SiN, and polyimide which is coated between lower layer electrodes L and upper layer electrodes U for insulation. Lower layer electrodes L and upper layer electrodes U are connected through contact holes. As described above, upper layer electrodes U and lower layer electrodes L are insulated by the insulation layer 3 and they are connected with each other through contact holes where connection is needed. FIG. 18 is an enlarged fragmentary view of a contact hole shown in FIG. 17. FIG. 19 is a cross-sectional view taken on line A--A' of FIG. 18. FIG. 20 is a cross-sectional view taken on line B--B' of FIG. 18. As explained above, the upper layer electrodes and the lower layer electrodes are insulated by the insulation layer 3 and connected with each other where connection is needed.
However, the signal conductors in matrix unit M are long and they are laid in the multilayer form. For that reason, there exists nonnegligible line-to-line capacitance among signal conductors, in other words among upper layer electrodes or among lower layer electrodes, and capacitive coupling occurs among signal conductors. This line-to-line capacitance can be the cause of crosstalk between adjacent elements or blocks.
FIG. 21 is a circuit diagram which shows an equivalent circuit of part of the matrix wiring unit shown in FIG. 17. In FIG. 21, C.sub.1 is line-to-line capacitance created among lower layer electrodes. C.sub.2 is line-to-line capacitance created among upper layer electrodes. C.sub.3 is capacitance created between upper layer electrodes and lower layer electrodes, especially where they cross. It can be understood from the equivalent circuit that unnecessary capacitive coupling is created between electrodes.
For instance, line-to-line capacitance between a pair of upper layer electrodes of a line sensor, the details of which will be described below, is as much as 120 pF. The reading length of the line sensor is 216 mm, which covers the length of A4 size paper. The pixel density of the line sensor is 8 dot/mm. The number of blocks is 27 and the number of elements is 64 element/block. Since a line sensor has such a large line-to-line capacitance, potential is induced in the adjacent signal conductor or signal line through the line-to-line capacitance when potential fluctuates in a signal conductor according to photoelectric conversion output. For example, when potential fluctuation occurs in upper layer electrode U.sub.2 in FIG. 17, potential is induced in the adjacent upper layer electrodes U.sub.1 and U.sub.3, and when potential fluctuation occurs in upper layer electrode U.sub.1 in FIG. 20, potential is induced in lower layer electrode L.sub.12, which is not connected with upper layer electrode U.sub.1, due to capacity coupling.
Crosstalk is caused in this way. Accordingly, the Modulation Transfer Function of the image sensor is decreased and resolution of the read image is degraded. It can be considered that the image sensor is not practical in the circumstances described above.
Since a plurality of lower layer electrodes, in other words plural blocks of lower layer electrodes, are connected with an upper layer electrode, crosstalk between blocks also occurs according to line-to-line capacitance among lower layer electrodes.